In order for the microcontroller to respond to an interrupt event the interrupt feature of the microcontroller must be enabled along with the specific interrupt. This is done by setting the Global Interrupt Enabled bit and the Interrupt Enable bit of the specific interrupt.
Interrupt Service Routine or Interrupt Handler
An Interrupt Service Routine (ISR) or Interrupt Handler is a piece of code that should be execute when an interrupt is triggered. Usually each enabled interrupt has its own ISR. In AVR assembly language each ISR MUST end with the RETI instruction which indicates the end of the ISR.
Interrupt Flags and Enabled bits
Each interrupt is associated with two (2) bits, an Interrupt Flag Bit and an Interrupt Enabled Bit. These bits are located in the I/O registers associated with the specific interrupt:
In summary basically both the Interrupt Flag and the Interrupt Enabled are required for an interrupt request to be generated as shown in the figure below.
Global Interrupt Enabled Bit
Apart from the enabled bits for the specific interrupts the global interrupt enabled bit MUST be enabled for interrupts to be activated in the microcontoller.
For the AVR 8-bits microcontroller this bit is located in the Status I/O Register (SREG). The Global Interrupt Enabled is bit 7, the I bit, in the SREG.
When writing assembly codes for your AVR microcontroller utilizing the interrupt feature the following MUST be observed:
As it relates to AVR microcontrollers - An interrupt vector is the memory address of an interrupt handler. The interrupt vector for each interrupt provided by the AVR microcontrollers can be found in its datasheet. The table below is an extract from the interrupt section of the ATMega8515 datasheet and gives the interrupt vectors for the interrupts provided with this microcontroller.
Please note here that the interrupt vectors are apart of the microcontroller's program memory. As such when utilizing interrupts this section of memory should be reserved to store pointers to interrupt handlers and not to store regular programs. For the ATMega8515 microcontroller to ensure that regular programs are not stored in this section of program memory insert the following line is your AVR assembly code.
|ATMega8515 Interrupt Vector Table|
|Vector #||Program Memory Address||Source||Definition|
|1||$000||RESET||ALL Reset - External Pin Reset, Power Down Reset, Watchdog Reset, Brown-Out Reset|
|2||$001||INT0||External Interrupt Request 0|
|3||$002||INT1||External Interrupt Request 1|
|4||$003||TIMER1 CAPT||Timer/Counter1 Capture Event|
|5||$004||TIMER1 COMPA||Timer/Counter1 Compare Match A|
|6||$005||TIMER1 COMPB||Timer/Counter1 Compare Match B|
|7||$006||Timer1 OVF||Timer/Counter1 Overflow|
|8||$007||Timer0 OVF||Timer/Counter0 Overflow|
|9||$008||SPI STC||Serial Transfer Complete|
|10||$009||USART RXC||USART Rx Complete|
|11||$00A||USART UDRE||USART Data Register Empty|
|12||$00B||USART TXC||USART Tx Complete|
|14||$00D||INT2||External Interrupt Request 2|
|15||$00E||TIMER0 COMP||Timer/Counter0 Compare Match|
|17||$010||SPM_RDY||Store Program Memory Ready|
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